1. Field of the Invention
The present invention relates to a display device, and particularly to an image display device having the function of being capable of enlarging and reducing a video signal when the number of vertical pixels of the video signal inputted to the image display device is different from the number of vertical pixels of a display unit of the image display device.
2. Description of the Related Art
In an image display unit or device for a personal computer or the like, for example, standards are defined in the number of pixels of a display panel. A VGA standard, an SVGA standard, an XGA standard, an SXGA standard, and a UXGA standard (however, any of VGA, SVGA, XGA, SXGA and UXGA corresponds to the trademark of IBM Corporation), etc. are widely known as typical ones. However, there may be a case in which as in the case in which an image comprised of a video signal for VGA is displayed on a display panel set to the XGA standard, the number of the pixels of the video signal inputted to the device and the number of the pixels of the display panel differ from each other. In that case, it is necessary to display the video signal on the display panel in enlarged or reduced form.
There has heretofore been adopted a system for storing data lying in an area that one desires to display in enlarged form and writing the same data into a plurality of lines of the display device when it is desired to implement the display of the data in enlarged form in the vertical direction. However, the present system needs peripheral devices such as a memory, an A/D converter, etc. and hence the display device increases in size and becomes complex. Therefore, the following has been proposed as an enlargement or scale-up display method.
In this type of image display device having the scale-up display function, a mode signal indicative of either the normal display or the enlargement display is set within a gate driver. The driving of one gate line or the driving of a plurality of gate lines is switched according to the type of the mode signal within one horizontal period in which image data corresponding to one line is outputted. Thus, if the number of the gate lines driven during one horizontal period is one, then the normal display is done. When the plurality of gate lines are simultaneously driven within one horizontal period, the same image data corresponding to one line is displayed on a plurality of lines on a display screen, whereby the scale-up display in the vertical direction is done. FIG. 4 is a timing chart for describing the operation of the gate driver employed in the image display device, wherein FIG. 4A is a timing chart in a normal mode, and FIG. 4B is a timing chart at a display twice that in an enlargement mode, respectively. In FIG. 4B, gage output waveforms of adjacent two lines, which are represented as X1 and X2, and X3 and X4, are identical to each other.
On the other hand, the liquid crystal display device or the like generally makes use of a method for adding auxiliary capacitances (Cs) to respective pixels for holding electrical charges during one scanning period. Several types are considered as the structures of the auxiliary capacitances. However, as a method of avoiding a reduction in opening rate without using capacitive electrodes for constructing the auxiliary capacitances, the structure of auxiliary capacitance so-called Cs on-gate structure is provided wherein pixel electrodes and gate lines are laid out so as to overlap with each other and the auxiliary capacitances are made up of these pixel electrodes and gate lines.
It was however impossible to apply the above-described scale-up display technique to the liquid crystal display device having the auxiliary capacitances each having the Cs on-gate structure. This is because since the gate line adjacent to the gate line for driving one pixel serves as one electrode of the auxiliary capacitance for the pixel in the Cs on-gate structure, the auxiliary capacitance does not function if the gate output waveform at the adjacent gate line is not rendered low in level upon writing of data into the pixel connected to one gate line (when the gate output waveform is rendered high in level). Since, however, the above-described scale-up display method sets the gate output waveforms at the adjacent two gate lines so as to be identical to each other, each auxiliary capacitance does not function.